The InnoLight TC-QQCOx-V00 is specifically designed to allow the end-user an active cable connection solution between ports based on QSFP connectivity, respectively. The cable are plug-and-play into these powered ports and provides the customer with all the advantages of a cost effective & easy to handle high speed connection. The transmitter side accepts electrical input signals which are voltage compatible with both Low Voltage Positive Emitter Coupled Logic (LVPECL) and Current Mode Logic (CML) levels. All input data signals are differential and are internally terminated. The receiver side recovered the parallel electrical input signals via a quad CDR into clear-edge parallel electrical output signals. The outputs electrical signals of receive side are voltage compatible with Current Mode Logic (CML) levels. All data signals are differential and support a data rates up to 10Gb per channel. All transmitter signals and receiver signals are AC coupled internally on both modules ends.

The figure on the next page, presents a detailed functional block diagram of the QSFP module with corresponding external connection pins.

A single +3.3V power supply is required to power up the module. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.

Module Select (ModSelL) is an input pin. When held low by the host, the module responds to 2-wire serial communication commands. The ModSelL allows the use of multiple QSFP modules on a single 2-wire interface bus – individual ModSelL lines for each QSFP module must be used.

Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP memory map.

The ResetL pin enables a complete module reset, returning module settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.

Low Power Mode (LPMode) pin is used to set the maximum power consumption for the module in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.

Module Present (ModPrsL) is a signal local to the host board which, in the absence of a module, is normally pulled up to the host Vcc. When a module is inserted into the connector, it completes the path to ground though a resistor on the host board and asserts the signal. ModPrsL then indicates a module is present by setting ModPrsL to a “Low” state.

 

Interrupt (IntL) is an output pin. When “Low”, it indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.